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| CML Semiconductor Products Call Progress Decoder 1.0 * Features Decodes Call Progress Tones Worldwide covering: * * * * FX663 D/663/3 January 1999 Provisional Issue * * * * * Low-Power (3 Volt) Operation Adjustable Detection Threshold Voice Detector Standard 3.58MHz Xtal/Clock Input 16-Pin SOIC and DIP Packages Single and Dual Tones Fax and Modem Answer/Originate Tones Special Information Tones Fast 'US Busy' Tone Detector 1.1 Brief Description The FX663 decodes the standard audible tone signals provided by telecom systems worldwide to indicate Dial, Ringing, Busy, Unobtainable and other stages of a call attempt. It provides the key features needed for intelligent, full-function, call progress monitoring by applications involving machine dialling or automatic call placement. The FX663 also incorporates the following features: * * * * * Single and dual tone decoding for better cross-system Call Progress monitoring. "US Busy" tone detector, saving time needed for "cadence verification" under Busy and Unobtainable conditions. This incorporates a separate 620Hz detector for improved response. A detector to indicate speech and non-call progress signals; this reduces voice falsing of call progress tones and adds Voice-Answer detection as a "connected" prompt. A fax and modem tone decoder. A separate, adjustable threshold, signal-level detector which reduces noise falsing. The FX663 uses new digital signal processing techniques to provide these advantages. It is a low cost, low power product with superior performance. It is available in industry standard 16-pin packages. (c) 1999 Consumer Microcircuits Limited CONTENTS Section Page 1.0 Features ......................................................................................................1 1.1 Brief Description.........................................................................................1 1.3 Signal List ...................................................................................................4 1.4 External Components.................................................................................6 1.5 General Description....................................................................................7 1.5.1 Overall Function Description .....................................................7 1.5.2 Glossary ......................................................................................7 1.5.3 Block Diagram Description.........................................................8 1.5.4 Decode Output Truth Table ........................................................9 1.6 Application Notes .......................................................................................9 1.6.1 General ........................................................................................9 1.6.2 Typical Response......................................................................10 1.7 Performance Specification.......................................................................11 1.7.1 Electrical Performance..............................................................11 1.7.2 Packaging..................................................................................16 (c) 1999 Consumer Microcircuits Limited 2 D/663/3 1.2 Block Diagram VDD VDD C7 VSS VBIAS (Components shown for unbalanced i/p) C4 SIGNAL VBIAS R1 C5 R2 C6 VBIAS VSS ENABLE AMPOP AMPINV AMPNINV OPAMP LEVEL DETECTOR CSN 620Hz DETECTOR IRQN D0 CONTROL AND OUTPUT LOGIC VDD R3 SIGIN C3 AMPLIFIER SIGNAL ANALYSER D1 D2 D3 C LLPROGRES A DETECTOR XTAL/CLOCK C1 C2 VSS X1 XTALN CLOCK OSCILLATOR AND DIVIDERS Figure 1 Block Diagram (c) 1999 Consumer Microcircuits Limited 3 D/663/3 1.3 Signal List Signal Name XTALN XTAL/CLOCK Type O/P I/P The inverted output of the on-chip oscillator. The input to the on-chip oscillator, for external Xtal circuit or clock. D3, D2, D1 and D0 is a 4-bit parallel data word output to the Controller. The transmission of data is under the control of the CSN input. These 3-state outputs are held at high impedance when CSN is at "1". See Bus Timing Diagram (Figure 8). If CSN is permanently at "0", D3, D2, D1 and D0 are permanently active. See Timing Diagram (Figure 4 to 7). 7 CSN I/P The data output control function: this input is provided by the Controller. Data transfer sequences are initiated, completed or aborted by the CSN signal. See Bus Timing Diagram (Figure 8). This output indicates an interrupt condition to the Controller by going to a logic "0". This is a "wire-ORable" output, enabling the connection of up to 8 peripherals to 1 interrupt port on the Controller. This pin has a low impedance pulldown to logic "0" when active and a highimpedance when inactive. An external pullup resistor is required. If CSN is permanently at "0", the interrupt condition is a logic "0" pulse. See Timing Diagram (Figure 4 to 7). 9 ENABLE I/P A low level input selects the powersave mode, all circuits are reset and disabled. D0 - D3 outputs become high impedance. A high level enables all circuits. (See also CSN). Description Package D4/P3 Pin No. 1 2 3 4 5 6 D3 D2 D1 D0 O/P O/P O/P O/P 8 IRQN O/P (c) 1999 Consumer Microcircuits Limited 4 D/663/3 1.3 Signal List (continued) Signal Name Vss SIGIN Type Power I/P The negative supply rail (ground). Signal input. The signal to this pin should be ac coupled. The dc bias of this pin is set internally. Internally generated bias voltage, held at VDD /2 when the device is not in powersave mode. It should be decoupled to Vss by a capacitor mounted close to the device pins. In powersave mode this pin is pulled towards VSS. The non-inverting input to the on-chip amplifier. The inverting input to the on-chip amplifier. The output of the on-chip amplifier, this is internally connected to the input of the Level Detector. The positive supply rail. Levels and voltages are dependent upon this supply. This pin should be decoupled to VSS by a capacitor. Description Package D4/P3 Pin No. 10 11 12 VBIAS O/P 13 14 15 AMPNINV AMPINV AMPOP I/P I/P O/P 16 VDD Power Notes: I/P = O/P = Input Output (c) 1999 Consumer Microcircuits Limited 5 D/663/3 1.4 External Components VDD C2 X1 VSS C1 XTALN XTAL D3 D2 D1 D0 CSN 1 2 3 4 5 6 7 8 16 15 14 VDD AMPOP C7 VSS R2 C5 R1 C4 VSS AMPINV AMPNINV VBIAS SIGIN VSS VSS FX663 13 12 11 10 9 C6 C3 VDD R3 IRQN ENABLE C1 C2 C3 C4 C5 C6 C7 33pF 33pF 0.1F 0.1F 100pF 1.0F 1F 20% 20% 20% 20% 20% 20% 20% R1 R2 R3 X1 100kW 510kW 20kW 3.579545MHz 10% 10% 10% 100ppm Figure 2 Recommended External Components (c) 1999 Consumer Microcircuits Limited 6 D/663/3 1.5 1.5.1 General Description Overall Function Description The FX663 consists of a Call Progress Tone Detector, a 620Hz Detector and a Level Detector. The FX663 Call Progress Tone Detector uses different tone detection methods from those commonly found with other products. Many traditional devices use a bandpass filter followed by an energy detector. The filter is usually designed to pass input signals with a frequency between about 300Hz and 700Hz, and the amplitudes of signals in this range are then checked against a level threshold. Any signal of acceptable level in this frequency band is classed as a Call Progress tone, including signals due to speech and noise. False outputs caused by speech are a common feature with these products, and background noise may lead to a stuck "detect" output. The FX663, by contrast, uses a stochastic signal processing technique based on analysis in both the frequency and time domain, with signal amplitude forming a small part in the decision process. This analysis includes checks on whether the signal has a "profile" which matches international standards for Call Progress tones, or a profile more likely to match that of speech, noise or other non-call-progress signals. It also adds checks on whether tones which include frequencies corresponding with the "US Busy" signals, Special Information Tones and Fax/Modem Tones have been detected. The following glossary, sections 1.5.3 and 1.5.4, provide a simple explanation of the decoding functions and features offered by the FX663. 1.5.2 Glossary Call Progress Tones: The single and dual frequency tones in the range 350Hz to 620Hz specified widely for call progress signalling. Call Progress Band: The nominal range 340Hz to 700Hz within which the FX663 will detect Call Progress tones. The detection algorithm requires that the tones have the characteristics typical of Call Progress Tones. 620Hz Detection: The nominal range 590Hz to 650Hz. Single tones in this range, or dual tones having a material frequency component within this range (e.g. 480 + 620Hz) will be detected. Non Call Progress Signal: A signal falling within the nominal range (a) 190Hz to 895Hz, but NOT within the Call Progress Band, or (b) within the nominal range 190Hz to 895Hz, but NOT meeting the DETECTION REQUIREMENTS when the signal falls in the Call Progress Band. Subject to the duration and other characteristics of such signals, the FX663 will usually interpret these as a Non Call Progress Signal (e.g. speech or other signal activity). Special Information Tone: Fax/Modem Low Tone: Fax/Modem High Tone: Alias Response: The nominal frequencies 950Hz or 1400Hz or 1800Hz. The nominal frequency 1250Hz. The nominal frequency 2150Hz. Frequencies above 2300Hz may cause aliasing effects in the Signal Analyser. The use of a low-pass filter in the Input Amplifier, as shown in Figure 1, will help to reduce any aliasing effects. (c) 1999 Consumer Microcircuits Limited 7 D/663/3 Minimum Input Signal: The minimum signal level for the specified tone decoding performance. The lower level at which absence of an input signal will be registered is not specified. However, a separate level detector makes amplitude information available. No Signal: A signal falling outside the nominal range 180Hz to 2280Hz or the absence of an input signal. Either will be detected as a No Signal condition. Nominal: Subject to dynamic tolerances within the signal analysis process. Absolute values are not material or adverse to performance. 1.5.3 Block Diagram Description (Reference Figure 1) Amplifier The input signal is amplified by a self-biased inverting amplifier. The dc bias of this input is internally set at 1/2VDD. The analyser samples the call progress signal at 9.3kHz. Call Progress Detector: Signal Analyser The frequency range, quality and consistency of the input signal is analysed by this functional block. To be classified as a call progress signal the input signal frequencies should lie between 340Hz and 700Hz, the signal to noise ratio must be 16dB or greater and the signal must be consistent over a period of at least 145ms. These decode criteria are continuously monitored and the assessment is updated every 7ms. 620Hz Detector The detector is designed to aid detection of "US Busy" tone. The bandwidth of the 620Hz Detector is 60Hz and the signal must be consistent over a period of at least 145ms for detection to occur. This assessment is updated every 55ms. Control and Output Logic This block categorises the nature of the signal into various decoded output states and controls the four outputs. See the Truth Table in section 1.5.4. Level Detector and OPAMP The OPAMP is configured as an amplifier with external components R1, R2, C4 and C5. The level detector operates by measuring the level of the amplified input signal and comparing it with a preset threshold which is defined inside the FX663 as shown in the detect equation. The detector output goes to the Control and Output Logic block. The data output is gated with the level detector's output. The data output is valid only if the level detector output is true. The level detector output can be forced true by connecting AMPNINV to VBIAS and connecting AMPINV to VSS through a 100k resistor. An interrupt is produced if the output data changes state. The detect equation is: For detect level where gain = -R2/R1. This amplifier may be used to buffer, unbalance or amplify line signals if required. Xtal/Clock Oscillator If the on-chip Xtal oscillator is to be used, then external components X1, R1, C1 and C2 are required. If an external clock source is to be used, then it should be connected to the XTAL/CLOCK input pin and the XTALN pin should be left unconnected. Gain x input signal level > 250 mVp-p (c) 1999 Consumer Microcircuits Limited 8 D/663/3 1.5.4 Decode Output Truth Table D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Conditions No Signal Call Progress Dual Tones: Will detect 350+440, 400+450, 440+480 Hz tones Non Call Progress Signal, e.g. Voice Activity Call Progress Dual Tone including 620Hz Detection: Will detect 480+620 Hz tones Special Information Tone: Will detect 950, 1400 and 1800 Hz tones Call Progress Single Tone: Will detect 400, 425, 440 and 450 Hz tones Will detect a single tone lying outside the Call Progress Band and within the Non Call Progress signal range Call Progress Single Tone including 620Hz Detection: Will detect 600 and 620 Hz tones Fax/modem High Tone: Will detect 2100 and 2200 Hz tones Reserved for future use Reserved for future use Reserved for future use Fax/modem Low Tone: Will detect 1200 and 1300 Hz tones Reserved for future use Reserved for future use Reserved for future use 1.6 1.6.1 Application Notes General Apply a reset after power-up by taking the ENABLE pin low. This places the device in a powersave mode and resets the internal circuits. It also places the data word output (D0-D3) in a high impedance state, regardless of the level on the CSN pin. From this mode the device can be returned to normal operation without any additional settling time, when using the component values recommended in Figure 2. The tone response times remain the same and are given in section 1.7.1. An interrupt is produced when the decode state is changed. This interrupt is reset by CSN going to logic "0". When CSN is permanently at "0", the interrupt condition is a 5 s logic "0" pulse on the IRQN pin. When CSN is set to logic "1", the data word output (D0-D3) goes into a high impedance state. (c) 1999 Consumer Microcircuits Limited 9 D/663/3 1.6.2 Typical Response Figure 3 Typical Response Chart (c) 1999 Consumer Microcircuits Limited 10 D/663/3 1.7 1.7.1 Performance Specification Electrical Performance Absolute Maximum Ratings Exceeding these maximum ratings can result in damage to the device. Min. -0.3 -0.3 -30 -20 Max. 7.0 VDD + 0.3 +30 +20 Units V V mA mA Supply (VDD - VSS) Voltage on any pin to VSS Current into or out of VDD and VSS pins Current into or out of any other pin P3 and D4 Package Total Allowable Power Dissipation at Tamb = 25C ... Derating Storage Temperature Operating Temperature Min. -55 -40 Max. 800 13 +125 +85 Units mW mW/C C C Operating Limits Correct operation of the device outside these limits is not implied. Notes Supply (VDD - VSS) Operating Temperature Xtal Frequency Min. 3.0 -40 3.57 Max. 5.5 +85 3.59 Units V C MHz (c) 1999 Consumer Microcircuits Limited 11 D/663/3 Operating Characteristics For the following conditions unless otherwise specified: Xtal Frequency = 3.579545MHz VDD = 3.3V to 5.0V, Tamb = - 40C to +85C. 0dB = 775 mVrms, S/N = 20dB Noise Bandwidth = 5kHz Band Limited Gaussian Notes DC Parameters IDD (all powersaved) IDD at VDD = 3.3V IDD at VDD = 5.0V Logic Interface Input Logic '1' Input Logic '0' Input Leakage Current (Logic '1' or '0') Input Capacitance Output Logic '1' (IOH = 120A) Output Logic '0' (IOL = 360A) 'Off' State Leakage Current AC Parameters SIGIN Pin Input Impedance Minimum Input Signal Level Input Signal Dynamic Range Level Detector Detection Signal Level (measured at AMPOP pin) OPAMP Input Impedance Voltage gain Xtal/Clock Input Pulse Width ('High' or 'Low') Input Impedance (at 100Hz) Gain (I/P = 1mV rms at 1kHz) 1, 2 1 1 Min. Typ. 30 0.5 1.0 Max. 1 2 Units A mA mA 3 70% -1.0 90% - - 30% 1.0 7.5 10% 10.0 VDD VDD A pF VDD VDD A 4 40.0 0.35 -40.0 - - M dB dB 5 - -19.0 - dB 6 10.0 - 500 - M V/V 7 40.0 10.0 20.0 - - ns M dB Notes: Not including any current drawn from the device pins by external circuitry. Enable input at VSS, CSN input at VDD. IRQN pin, D0 to D3 pins. Small signal impedance over the frequency range 100Hz to 2300Hz and at 5.0V. Input signal level is multiplied by the voltage gain (-R2/R1). The overall signal should be larger than 250mVp-p, at VDD = 5.0V, scale signal for different VDD. 6. Open loop, small signal low frequency measurements. 7. Timing for an external input to the XTAL/CLOCK pin. 1. 2. 3. 4. 5. (c) 1999 Consumer Microcircuits Limited 12 D/663/3 1.7.1 Electrical Performance (continued) tI tL No Signal Call Progress Single Tone CPTone 620 Hz tGD CPTone 620 Hz tGI CPTone 620 Hz SIGIN ENABLE Tri-state D0 D1 D2 D3 CSN IRQN "0" tRP tDRP tRP Tri-state tDE See Note 1 "0" tHIZ tDI tDI tIP Figure 4 Timing Diagram: Call Progress Tone(s) tI No Signal tL Non Call Progress Signal tNG Non Call Progress Signal SIGIN ENABLE Tri-state D0 "0" tNRP tNDRP tDE D1 D2 D3 CSN IRQN See Note 1 "0" "0" tDI tIP Figure 5 Timing Diagram: Non Call Progress Signal Note 1: D2 is '1' only when the Call Progress signal, or a Non Call Progress signal, is a single frequency tone. (c) 1999 Consumer Microcircuits Limited 13 D/663/3 1.7.1 Electrical Performance (continued) tI No Signal tL Special Information Tone Special Information Tone tGD Special Information Tone tGI Special Information Tone SIGIN ENABLE Tri-state D0 D1 "0" "0" Tri-state tDE D2 D3 CSN IRQN "0" "0" tRP tDRP tRP tHIZ tDI tDI tIP Figure 6 Timing Diagram: Special Information Tones tI tL No Signal Fax/Modem Low Tone Fax/Modem High Tone tGD Fax/Modem High Tone tGI Fax/Modem High Tone SIGIN ENABLE D0 D1 D2 Tri-state "0" Tri-state tDE "0" tRP tDRP tRP tHIZ D3 CSN IRQN "0" tDI tDI tIP Figure 7 Timing Diagram: Fax/Modem Tones (c) 1999 Consumer Microcircuits Limited 14 D/663/3 1.7.1 Electrical Performance (continued) SIGIN No Signal Call Progress Signal ENABLE tRP tDRP CSN IRQN tDI D0 to D3 Tri-State tIR Tri-State tDI tDE tHIZ Figure 8 Bus Timing For the following conditions unless otherwise specified: Xtal Frequency = 3.579545MHz, VDD = 3.3V to 5.0V, Tamb = -40C to +85C. Parameter tRP tDRP tNRP tNDRP tI tL tGI tGD tNG tDI tDE tHIZ tIR tIP Notes: Call Progress Tone Response Time Call Progress Tone De-response Time Non Call Progress Signal Response Time Non Call Progress Signal De-response Time Burst Length Ignored Burst Length Detected Call Progress Tone Gap Length Ignored Call Progress Tone Gap Length Detected Non Call Progress Signal Gap Length Ignored Data available to Interrupt pulse "CSN-Low " to Data Valid "CSN-High" to Output Tri-state Interrupt Reset Time Interrupt Low Pulse 8. 9. 10. 11. 8 8 8,9,11 8,9 10 Notes 8 8 Min. 145 145 40 4.0 Typ. 80 80 5.0 Max. 145 145 70 20 430 0.2 1.0 0.2 6.0 Units ms ms ms ms ms ms ms ms ms s s s s s Timing also applies to Special Information Tones and Fax/modem Tones. Only applies to burst of the same frequency. If the gap > 90ms, a NO Signal state will be detected. Special Information Tones and Fax/modem tones tGI is 15ms maximum. (c) 1999 Consumer Microcircuits Limited 15 D/663/3 Call Progress Decoder FX663 1.7.2 Packaging Figure 9 D4 Mechanical Outline: Order as part no. FX663D4 Figure 10 P3 Mechanical Outline: Order as part no. FX663P3 Handling precautions: This product includes input protection, however, precautions should be taken to prevent device damage from electro-static discharge. CML does not assume any responsibility for the use of any circuitry described. No IPR or circuit patent licences are implied. CML reserves the right at any time without notice to change the said circuitry and this product specification. CML has a policy of testing every product shipped using calibrated test equipment to ensure compliance with this product specification. Specific testing of all circuit parameters is not necessarily performed. CONSUMER MICROCIRCUITS LIMITED 1 WHEATON ROAD WITHAM - ESSEX CM8 3TD - ENGLAND Telephone: Telefax: e-mail: +44 1376 513833 +44 1376 518247 sales@cmlmicro.co.uk http://www.cmlmicro.co.uk CML Microcircuits COMMUNICATION SEMICONDUCTORS CML Product Data In the process of creating a more global image, the three standard product semiconductor companies of CML Microsystems Plc (Consumer Microcircuits Limited (UK), MX-COM, Inc (USA) and CML Microcircuits (Singapore) Pte Ltd) have undergone name changes and, whilst maintaining their separate new names (CML Microcircuits (UK) Ltd, CML Microcircuits (USA) Inc and CML Microcircuits (Singapore) Pte Ltd), now operate under the single title CML Microcircuits. These companies are all 100% owned operating companies of the CML Microsystems Plc Group and these changes are purely changes of name and do not change any underlying legal entities and hence will have no effect on any agreements or contacts currently in force. CML Microcircuits Product Prefix Codes Until the latter part of 1996, the differentiator between products manufactured and sold from MXCOM, Inc. and Consumer Microcircuits Limited were denoted by the prefixes MX and FX respectively. These products use the same silicon etc. and today still carry the same prefixes. In the latter part of 1996, both companies adopted the common prefix: CMX. This notification is relevant product information to which it is attached. Company contact information is as below: CML Microcircuits (UK)Ltd COMMUNICATION SEMICONDUCTORS CML Microcircuits (USA) Inc. COMMUNICATION SEMICONDUCTORS CML Microcircuits (Singapore)PteLtd COMMUNICATION SEMICONDUCTORS Oval Park, Langford, Maldon, Essex, CM9 6WG, England Tel: +44 (0)1621 875500 Fax: +44 (0)1621 875600 uk.sales@cmlmicro.com www.cmlmicro.com 4800 Bethania Station Road, Winston-Salem, NC 27105, USA Tel: +1 336 744 5050, 0800 638 5577 Fax: +1 336 744 5054 us.sales@cmlmicro.com www.cmlmicro.com No 2 Kallang Pudding Road, 09-05/ 06 Mactech Industrial Building, Singapore 349307 Tel: +65 7450426 Fax: +65 7452917 sg.sales@cmlmicro.com www.cmlmicro.com D/CML (D)/1 February 2002 |
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